Semiconductor device and method for manufacturing the same

ABSTRACT

A semiconductor device is provided without degrading the performance of an internal circuit, which has an SOI structure coexistingly having an SOI static electricity protection circuit to prevent an internal circuit from being damaged due to static electricity through an input/output pad. To achieve this, a structure is made by comprising a silicon substrate of a first conductivity type, a buried oxide film formed on the silicon substrate, a first silicon layer of the first conductivity type formed on the buried oxide film, a second silicon layer of the first conductivity type formed on the buried oxide film and having a thickness smaller than the first silicon layer of the first conductivity type, and an SOI static electricity protection circuit provided between an input/output pad and an internal circuit. The internal circuit is formed in the second silicon layer of the first conductivity type, the SOI static electricity protection circuit being formed in the first silicon layer of the first conductivity type.

BACKGROUND OF THE INVENTION

[0001] This invention relates to a semiconductor integrated circuitdevice having an SOI (Silicon on Insulator) structure. Moreparticularly, the invention is concerned with an SOI static electricityprotection circuit for preventing an internal circuit from being damageddue to static electricity or the like to be inputted through theinput/output pad, and the internal circuit.

[0002] In general, a static electricity protection circuit is providedbetween an input/output pad and an internal circuit to instantaneouslyrelease high voltage, such as static electricity, having been inputtedthrough the input/output pad into regions other than the internalcircuit (silicon substrate or the like). Due to this, the internalcircuit (particularly, a MOSFET gate oxide film) is prevented from beingdamaged due to a high voltage as this.

[0003] The static electricity protection circuits as above involveavalanche breakdown at PN junctions, snap back owing to MOSFET bipolaroperation, punch through by punch-through devices, and so on. The staticelectricity protection circuits of these types have a performance thatthe possibility of applying a high voltage to an internal circuit can bedecreased with decrease in resistance over a high-voltage releasingpath. Furthermore, prevention is also made against thermal breakdown tobe caused due to flow of an overcurrent by the static electricityprotection circuit itself. That is, static electricity protectionperformance is enhanced. The resistance is almost determined principallyby an area of a PN junction of the static electricity protection circuitthrough which a high voltage current is to flow and a volume of asubstrate.

[0004] For static electricity protection circuits made in a bulkstructure, the PN junction has an area corresponding to an area of aside surface plus that of a bottom surface thereof, accordingly beingsufficient in junction area. Also, the volume is sufficient because thesubstrate itself corresponds to a bulk.

[0005] Meanwhile, the SOI structure includes a buried oxide film on asilicon substrate, and a silicon layer of a first conductivity type inwhich semiconductor elements are to be built on the buried oxide film.

[0006] Recently, in order to realize high speed operation with low powerconsumption for an internal circuit formed in a silicon layer, there arenecessities to completely deplete a MOSFET forming an internal circuitand reduce source and drain capacitance. Due to this, there is atendency of decreasing the thickness of a silicon layer. In a case thata static electricity protection circuit made in a bulk structure for asemiconductor device is applied directly to a semiconductor devicehaving an SOI structure as stated before, the reduction in silicon layerthickness is meant to decrease the volume of a substrate due to areduction in thickness of the first conductivity type silicon layer as asubstrate besides the decrease in PN junction area due to reduction inPN junction side surface area and losing a bottom surface area.

[0007] That is, recently there has been a difficulty in applying astatic electricity protection circuit made in a bulk structure for asemiconductor device directly to an SOI-structured semiconductor device,because of the reason as discussed above.

SUMMARY OF THE INVENTION

[0008] It is, therefore, an object of the present invention to provide,in a semiconductor device having an SOI structure, an SOI staticelectricity protection circuit which is capable of properly protectingan internal circuit against a high voltage, such as static electricity,to be inputted through an input/output pad without lowering theperformance of the internal circuit.

[0009] A semiconductor device having an SOI structure according to thepresent invention comprises: a silicon substrate of a first conductivitytype; a buried oxide film formed on the silicon substrate; a firstsilicon layer of a first conductivity type formed on the buried oxidefilm; a second silicon layer of the first conductivity type formed onthe buried oxide film and having a thickness smaller than the firstsilicon layer; an SOI static electricity protection circuit providedbetween an input/output pad and an internal circuit; wherein theinternal circuit is formed in the second silicon layer of the firstconductivity type, and the SOI static electricity protection circuit isformed in the first silicon layer of the first conductivity type.

[0010] As stated before, the formation of an SOI static electricityprotection circuit in the thick first first-conductivity-type siliconlayer can increase the area of a PN junction for the SOI staticelectricity protection circuit as well as the volume of the SOI staticelectricity protection circuit in the substrate, improving protectionperformance for the SOI static electricity protection circuit.Furthermore, an internal circuit can be configured in the thin secondfirst-conductivity-type silicon layer. Accordingly, the internal circuitis not degraded in performance.

[0011] Furthermore, the invention uses a method for manufacturing asemiconductor device comprising: a step of forming a buried oxide filmin a silicon substrate of a first conductivity type; a step ofselectively oxidizing a surface of the first-conductivity-type siliconlayer on the buried oxide film and selectively forming an oxide film onthe surface of the first-conductivity-type silicon layer; a step ofstripping away the oxide film and thereby exposing a surface of a secondfirst-conductivity-type silicon layer smaller in thickness than thefirst-conductivity-type silicon layer under the oxide film; and a stepof forming an internal circuit in the second first-conductivity-typesilicon layer and forming an SOI static electricity protection circuitfor protecting the internal circuit against static electricity from aninsert/output pad in the first first-conductivity-type silicon layerother than the second first-conductivity-type silicon layer.

[0012] The use of this method makes it possible to form on a samesubstrate a first first-conductivity-type silicon layer and a secondfirst-conductivity-type silicon layer that are different in thickness.The formation of an SOI static electricity protection circuit in thethick first first-conductivity-type silicon layer can increase the areaof a PN junction for the SOI static electricity protection circuit.Moreover, the SOI static electricity protection circuit at a substrateregion can be increased in volume, improving protection performance forthe SOI static electricity protection circuit. Furthermore, an internalcircuit can be configured in the thin second first-conductivity-typesilicon layer. Thus, the internal circuit is not degraded inperformance. Furthermore, the second first-conductivity-type siliconlayer has a surface provided flat and less in defects as compared tothat formed by a method of machining or directly etching thefirst-conductivity-type silicon layer. Accordingly, Al interconnectionsfor the internal circuit to be formed on the surface are prevented fromsuffering defects such as disconnection. Also, the boundary between thethick silicon layer and the thin silicon layer can be made in a lightlytapered form. This can prevent trouble of disconnection in aninterconnection between the circuits, including the SOI staticelectricity protection circuit, formed in the thick silicon layer andthe circuits, including the internal circuit, formed in the thin siliconlayer.

[0013] Furthermore, the invention uses a method for manufacturing asemiconductor device comprising: a step of dividing a silicon substrateof a first conductivity type with a first silicon layer of the firstconductivity type and a second silicon layer of the first conductivitytype, forming a first buried oxide film underneath a surface of thefirst silicon layer of the first conductivity type, and forming a secondburied oxide film in a region deeper than the first buried oxide filmunderneath a surface of the second silicon layer of the firstconductivity type; and a step of forming an internal circuit in thesecond first-conductivity-type silicon layer and forming an SOI staticelectricity protection circuit for protecting the internal circuitagainst static electricity in the first-conductivity-type silicon layerother than the second first-conductivity-type silicon layer.

[0014] The use of this method makes it possible to form on a samesubstrate a first first-conductivity-type silicon layer and a secondfirst-conductivity-type silicon layer that are different in thickness.The formation of an SOI static electricity protection circuit in thethick first first-conductivity-type silicon layer can increase the areaof a PN junction for the SOI static electricity protection circuit.Moreover, the SOI static electricity protection circuit at a substrateregion can be increased in volume, improving protection performance forthe SOI static electricity protection circuit. Furthermore, an internalcircuit can be configured in the thin second first-conductivity-typesilicon layer. Thus, the internal circuit is not degraded inperformance. Furthermore, it is possible to decrease the number ofprocess steps correspondingly to unnecessary processes such as the oxidefilm forming process and the oxide film stripping process, as comparedto the aforementioned method of stripping away a selectively-formedoxide film to form a first first-conductivity-type silicon layer and asecond first-conductivity-type silicon layer that are different inthickness. Also, no boundary exists between the firstfirst-conductivity-type silicon layer and the secondfirst-conductivity-type silicon layer, thus providing flatness. This canprevent trouble of disconnection in an interconnection between thecircuits, including the SOI static electricity protection circuit,formed in the first first-conductivity-type silicon layer and thecircuits, including the internal circuit, formed in the secondfirst-conductivity-type silicon layer.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015]FIG. 1 is a schematic circuit diagram of a semiconductor devicehaving an SOI structure according to the present invention;

[0016]FIG. 2 is a typical sectional view of the semiconductor devicehaving an SOI structure according to the present invention;

[0017]FIG. 3 is a schematic sectional view of an internal circuit formedin a thin silicon layer;

[0018]FIG. 4 is a schematic sectional view of a static electricityprotection circuit formed in a thick silicon layer;

[0019]FIGS. 5A to 5E are typical sectional views for explaining a methodfor forming a semiconductor device having an SOI structure according tothe present invention; and

[0020]FIGS. 6A to 6D are typical sectional views for explaining a methodfor forming a semiconductor device having an SOI structure showing anembodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

[0021] A semiconductor device using an SOI structure according to thepresent invention and method for manufacturing the same will now bedescribed with reference to the drawings. It should be noted that thedrawings are simplified for the explanation sake and hence not intendedfor the invention to be limited thereto.

[0022] Referring to FIG. 1, there is illustrated a schematic circuitdiagram of a semiconductor device using an SOI structure according to anembodiment of the invention. As shown in FIG. 1, the semiconductordevice is configured by an input/output pad 103 for inputting oroutputting a signal, an internal circuit 102 formed by a MOSFET 105 orthe like, and an SOI static electricity protection circuit 101 formed byan N-channel MOSFET 104. The N-channel MOSFET 104 has its drainconnected to a node connecting between the input/output pad 103 and theinternal circuit 102. The source and gate electrodes of the N-channelMOSFET 104 are connected to a GND terminal.

[0023] In the above configuration, it is possible to prevent an gateoxide film on the MOSFET 105 or the like of the internal circuit 102from being applied by a high voltage due to snap back that is caused byescaping static electricity inputted to the input/output pad 103 ontothe GND terminal by bipolar operation following surface breakdown in theN-channel MOSFET 104. In this manner, the gate oxide film is preventedfrom being damaged.

[0024] Referring to FIG. 2, there is illustrated a typical sectionalview of the semiconductor device using an SOI structure according to theembodiment of the invention. As shown in FIG. 2, the semiconductordevice is in an SOI structure formed by a buried oxide film 107 providedon a silicon substrate 106 of a first conductivity type, and a siliconlayer 108 of the first conductivity type having thick and thin regionscoexisting on the buried oxide film 107. An SOI static electricityprotection circuit is formed in an region A 109 as a surface of thethick region of the first-conductivity-type silicon layer 108, while aninternal circuit 102 is formed in a region B 110 as a surface of thethin region of the first-conductivity-type silicon layer 108.

[0025] Referring to FIG. 3, a typical sectional view of a MOSFET 105 isshown which is a part of the internal circuit 102 formed in the region B110 of FIG. 2. As shown in FIG. 3, a buried oxide film 107 is formed ona silicon substrate 106 of a first conductivity type. In afirst-conductivity-type silicon layer 108 on the buried oxide film 107,formed are a MOSFET drain 202, source 203, gate 201, gate oxide film 206and LOCOS oxide films 204. Incidentally, a MOSFET channel region as asubstrate region becomes the first-conductivity-type silicon layer 108left after the MOSFET formation.

[0026] As shown in FIG. 3, because the MOSFET borders at its drain 202and source 203 on the LOCOS oxidation films 204 and buried oxide film107, it has PN junctions that are at junctions with thefirst-conductivity-type silicon layer 108. Accordingly, in the MOSFETthe drain 202 and the source 203 can be reduced in PN junctioncapacitance. It is therefore possible to reduce the amount and time ofcharge and discharge current to and from the drain 202 and source 203.That is, a MOSFET can be realized which is rapid in on-off responsespeed but low in current consumption upon switching. Furthermore,because the first-conductivity-type silicon layer 108 as a channelregion is formed small in thickness as shown in FIG. 3, completedepletion is possible in the channel region. Consequently, the gateelectrode 201 is reduced in charge/discharge current thereby reducingcharge/discharge time. Thus, a MOSFET is realized which is high inon-off response speed but low in current consumption upon switching.

[0027] Accordingly, by configuring an internal circuit using the MOSFETof FIG. 3, the internal circuit will be low in current consumption buthigh in operation speed and can be operated at a desired speed even withpower voltage to the internal circuit reduced.

[0028] Referring FIG. 4, there is shown a typical sectional view of asemiconductor device having an N-channel MOSFET 104 formed as an SOIstatic electricity protection circuit 101 in the region A 110 of FIG. 2.Explanations will be omitted for the same elements as those of FIG. 3.As shown in FIG. 4, a substrate contact layer 205 which is higher inimpurity concentration than a first-conductivity-type silicon layer 108is added to a MOSFET configured same as that of FIG. 3 in order toconnect the first-conductivity-type silicon layer 108 region to a GNDterminal. Incidentally, a drain 202 is connected to an input/output pad103 while a gate electrode is connected to the GND terminal through asource 203.

[0029] As shown in FIG. 4 a buried oxide film 107 is positioned deeperthan the buried oxide film of FIG. 3. This provides the followingstructural features. First, the drain 202 and source 203 are notprevented by the buried oxide film 107 from being diffused in a depthdirection and allowed to be formed deeper than those of FIG. 3. Thisincreases PN junction areas of the drains 202 and source 203 at theirside surfaces as compared to the structure of FIG. 3. Moreover, thedrain 202 and source 203 can have PN junctions at their bottom surfaces,correspondingly increasing the PN junction areas. Second, afirst-conductivity-type silicon layer provided as a substrate portionfor the MOSFET is increased in volume more than that of FIG. 3.

[0030] Incidentally, where using an internal circuit configured by aMOSFET of FIG. 3 and an SOI static electricity protection circuit ofFIG. 4, it is possible to form an SOI static electricity protectioncircuit during a process of forming an internal circuit withoutrequiring new additional process thus providing also a feature.

[0031] The operation of static electricity protection by the SOI staticelectricity protection circuit constructed as above will be describedwith reference to FIG. 4. The static electricity charges entered throughthe input/output pad 103 first flow from the drain 202 to thefirst-conductivity-type silicon layer 108 due to surface breakdown. Thesurface breakdown produces electron-and-hole pairs whose holes flow tothe substrate contact layer 205 through the first-conductivity-typesilicon layer 108. On this occasion, the first-conductivity-type siliconlayer 108 has a resistance component. Accordingly, the current flowthrough the resistance component causes a potential difference so thatpotential is increased in a deeper region of the silicon layer than thechannel region. As a result, a bipolar turns on which is constituted bythe N-type drain 202, the deeper silicon layer than the p-type channelregion and the N-type source 203, thus allowing the charges to flow.This operation releases the static electricity charges entering throughthe input/output pad 103. Thus, the internal circuit connected to theinput/output pad 103 can be prevented from being damaged due to staticelectricity.

[0032] It can be considered that the higher the capability of releasingstatic electricity the higher the performance of the SOI staticelectricity protection circuit. The capability of releasing staticelectricity is increased with decrease in resistance value of aresistance component of each portion when the bipolar is turned on. Thatis, the capability of releasing static electricity increases withincrease in the junction area between the drain 202 as a staticelectricity charge path and the first-conductivity-type silicon layer108 as well as the volume of the first-conductivity-type silicon layer108 at a deeper region than the channel region having a role to flowstatic electricity charge from the drain 202 to the source 203 and theSOI static electricity protection circuit having preferred performancecan be obtained.

[0033] From the above point of view, where an SOI static electricityprotection circuit as discussed above is formed in a thinfirst-conductivity-type silicon layer 108 as shown in FIG. 3, even if abipolar turns on as mentioned above, there is considerable decrease inthe junction area between a drain 202 as a static electricity chargepath and a first-conductivity-type silicon layer 108 as well as in thevolume of a first-conductivity-type silicon layer 108 at a deeper regionthan a channel region having a role to flow static electricity chargesfrom a drain 202 to a source 203. This cannot release static electricitycharges at all. Besides, the reduced volume of thefirst-conductivity-type silicon layer 108 makes it difficult to diffusethe heat caused due to charge flow, possibly resulting in thermalbreakdown in the SOI static electricity protection circuit.

[0034] In order to avoid this, in the present invention the SOI staticelectricity protection circuit was formed in the thickfirst-conductivity-type silicon layer 108 as shown in FIG. 4. This makesit possible to obtain an SOI structure having a close performance tothat of a conventional static electricity protection circuit formed in afirst-conductivity-type bulk substrate. Furthermore, by forming a MOSFETconstituting an internal circuit in a thin first-conductivity-typesilicon layer 108 as shown in FIG. 3, it is possible to obtain anexcellent performance unique to the MOSFET constituted in anSOI-structured substrate as above.

[0035] That is, the present invention can provide on an SOI substrateboth an internal circuit excellent in performance and an SOI staticelectricity protection circuit improved in static electricity protectionperformance. It is therefore possible to provide a semiconductor devicehaving an SOI static electricity protection circuit which can protectproperly an internal circuit from high voltage due to the staticelectricity inputted through the input/output pad without degrading theinternal circuit performance.

[0036] Incidentally, the above embodiment was explained on the typeutilizing snap back due to the bipolar operation of a MOSFET having afeature of providing a desired static electricity protection performancewith a small area in the SOI static electricity protection circuit.However, for other static electricity protection circuit utilized in theconventional first-conductivity-type bulk substrate, it is possible torealize on an SOI-structured substrate an SOI static electricityprotection circuit having a close performance to that. For example, forthe static electricity protection circuits utilizing PN junctionavalanche breakdown, punch-though device punch through or the like, thepresent invention can realize an SOI static electricity protectioncircuit having a high static electricity protection performance on anSOI-structured substrate because of obtaining a sufficient PN junctionarea and substrate volume as so far discussed. Also, although in theabove embodiment of the invention explanation was made on the SOI staticelectricity protection circuit using the N-channel MOSFET, it is alsopossible to realize one using a P-channel MOSFET if inverting thepolarity.

[0037] Now a method for manufacturing a semiconductor device having anSOI structure of the invention will be described with reference to thedrawings.

[0038] Referring to FIG. 5, there is shown a view illustrating a processfor manufacturing a semiconductor device having an SOI structure as wasdiscussed in the embodiment of the invention from a usual SOI-structuredsubstrate. Explaining according to FIGS. 5A to 5E, as shown in FIG. 5A apatterned silicon nitride (SiNx) film 301 is formed on an SOI-structuredsubstrate formed by a first-conductivity-type silicon substrate 106, aburied oxide film 107 thereon and a first-conductivity-type siliconlayer 108 thereon. Then, as shown in FIG. 5B the first-conductivity-typesilicon layer 108 is oxidized at a surface not covered by the siliconnitride film 301 to form an oxide layer 302. Then, as shown in FIG. 5Cthe silicon nitride film 301 is stripped off, and the oxide layer isalso stripped off as shown in FIG. 5D. As shown in FIG. 5E an internalcircuit as stated before is formed in a region B 110 as a surface of asilicon layer region reduced in thickness by stripping off the oxidelayer, while an SOI static electricity protection circuit as mentionedbefore is formed in a region A 109 as a silicon layer surface remainedthick.

[0039] The features of this process lies in that a semiconductor devicehaving an SOI structure as discussed in the embodiment of the inventioncan be easily realized by merely purchasing an SOI substrate with asilicon layer 108 made somewhat thick and that the thin silicon layerstripped of the oxide layer 302 shown in FIG. 5C is more flat and smoothwith less defects as compared to the case of etching the silicon layeras it is or forming a thin silicon layer by machining. That is, theinternal circuit made in the thin silicon layer will be almost free oftroubles such as disconnection.

[0040] Furthermore, the thick silicon layer and the thin silicon layerhas such a boundary as a lightly tapered boundary as shown in FIG. 5D.Accordingly, there is less possibility that disconnection occurs in aninterconnection between the circuits, including the SOI staticelectricity protection circuit, formed in the region A 109 shown in FIG.5E and the circuits, including the internal circuit, formed in theregion B 110 also shown in FIG. 5E.

[0041] Referring to FIG. 6, there is shown a view illustrating a processfor manufacturing a semiconductor device having an SOI structure asdiscussed in the embodiment of the invention from a conventional siliconsubstrate of a first conductivity type not having an SOI structure. Asshown in FIG. 6A, oxygen molecules are ion-implanted with a weak energyinto a second first-conductivity-type silicon layer as a certaindetermined region at a region a little lower than a surface of thesilicon layer. Furthermore, as shown in FIG. 6B oxygen molecules areion-implanted with an intense energy to a first first-conductivity-typesilicon layer as the other than the second first-conductivity-typesilicon layer at a region considerably lower than the surface thereof.As shown in FIG. 6C anneal is made for the oxygen moleculesion-implanted in or before the process of FIG. 6B. Thus,recrystallization is made to form a first buried oxide film 403 in aregion considerably lower than the surface of the firstfirst-conductivity-type silicon layer, and a second buried oxide film402 in a region a little lower than the surface of the secondfirst-conductivity-type silicon layer. As shown in FIG. 6D, an internalcircuit as stated before is formed in a region B 110 in and nearby thesurface of the second first-conductivity-type silicon layer while an SOIstatic electricity protection circuit as stated before is formed in aregion A 109 in and nearby the surface of the firstfirst-conductivity-type silicon layer.

[0042] The features of this process lies in that a semiconductor devicehaving an SOI structure as discussed in the embodiment of the inventioncan be easily realized merely by purchasing a conventionally-usedfirst-conductivity-type silicon substrate and that, because buried oxidefilm can be formed at deep and shallow regions by merely changing theenergy for oxygen molecule ion implant, thick and thin regions betweenthe surface of the silicon substrate and the buried oxide film of thesilicon layer can be formed easier and through less process steps thanthe process shown in FIGS. 5. Also, the silicon layer surface in FIG. 6Cis considerably reduced in defects by anneal. Accordingly, there is lesspossibility that troubles, such as disconnection, occur in internalcircuit and SOI static electricity protection circuits formed in thesilicon surface. Furthermore, as shown in FIG. 6D flatness is given,instead of a boundary, between the first first-conductivity-type siliconlayer and the second first-conductivity-type silicon layer. Accordingly,there is no possibility at all that disconnection occurs in aninterconnection provided between the circuits, including the SOI staticelectricity protection circuit, formed in the region A 109 shown in FIG.6D and the circuits, including the internal circuit, formed in theregion B 110 shown in FIG. 5E.

[0043] According to the present invention, it is possible in asemiconductor device having an SOI structure to provide an SOI staticelectricity protection circuit for preventing an internal circuit frombeing damaged by static electricity entered through an input/output padwith the performances of the internal circuit maintained unchanged.Furthermore, internal and SOI static electricity protection circuits canbe formed by an easy process. Moreover, the internal and SOI staticelectricity protection circuits can reduce the probability of occurrenceof troubles such as disconnection.

What is claimed is:
 1. A semiconductor device comprising: a siliconsubstrate; a buried oxide film formed on the silicon substrate; a firstsilicon layer of a first conductivity type formed on the buried oxidefilm; a second silicon layer of the first conductivity type formed onthe buried oxide film and having a thickness smaller than the firstsilicon layer; an SOI static electricity protection circuit providedbetween an input/output pad and an internal circuit; and wherein theinternal circuit is formed in the second silicon layer, and the SOIstatic electricity protection circuit is formed in the first siliconlayer.
 2. A method for manufacturing a semiconductor device comprising:a step of forming a buried oxide film in a silicon substrate of a firstconductivity type; a step of selectively oxidizing a surface of thefirst-conductivity-type silicon layer on the buried oxide film andselectively forming an oxide film on the surface of thefirst-conductivity-type silicon layer; a step of stripping away theoxide film and thereby exposing a surface of a secondfirst-conductivity-type silicon layer smaller in thickness than thefirst-conductivity-type silicon layer; and a step of forming an internalcircuit in the second first-conductivity-type silicon layer and formingan SOI static electricity protection circuit for protecting the internalcircuit in the first-conductivity-type silicon layer.
 3. A method formanufacturing a semiconductor device comprising: a step of dividing asilicon substrate of a first conductivity type with a first siliconlayer of the first conductivity type and a second silicon layer of thefirst conductivity type, forming a first buried oxide film underneath asurface of the first silicon layer of the first conductivity type, andforming a second buried oxide film in a region shallower than the firstburied oxide film underneath a surface of the second silicon layer ofthe first conductivity type; and a step of forming an internal circuitin the second first-conductivity-type silicon layer and forming an SOIstatic electricity protection circuit for protecting the internalcircuit against static electricity in the first first-conductivity-typesilicon layer.